D9.71 TRCTSCTLR, Global Timestamp Control Register
The TRCTSCTLR controls the insertion of global timestamps in the trace streams. When the selected
event is triggered, the trace unit inserts a global timestamp into the trace streams. The event is selected
from one of the Resource Selectors.
Bit field descriptions
The TRCTSCTLR is a 32-bit register.
31 08 7
SEL
36 4
TYPE
RES0
Figure D9-68 TRCTSCTLR bit assignments
RES0, [31:8]
RES0 Reserved.
TYPE, [7]
Single or combined resource selector.
RES0, [6:4]
RES0 Reserved.
SEL, [3:1]
Identifies the resource selector to use.
Bit fields and details not provided in this description are architecturally defined. See the Arm
®
Architecture Reference Manual Armv8, for Armv8-A architecture profile.
The TRCTSCTLR can be accessed through the external debug interface, offset 0x030.
D9 ETM registers
D9.71 TRCTSCTLR, Global Timestamp Control Register
100798_0300_00_en Copyright © 2016–2018 Arm Limited or its affiliates. All rights
reserved.
D9-582
Non-Confidential
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