ARM Cortex-A76 Core User Manual

A2.3 About system control
The system registers control and provide status information for the functions that the core implements.
The main functions of the system registers are:
• Overall system control and configuration.
• MMU configuration and management.
• Cache configuration and management.
• System performance monitoring.
• GIC configuration and management.
The system registers are accessible in the AArch64 EL0-EL3 and AArch32 EL0 Execution state. Some
of the system registers are accessible through the external debug interface.
A2 Technical overview
A2.3 About system control
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A2-39
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ARM Cortex-A76 Core Specifications

General

Architecture	ARMv8.2-A
Microarchitecture	Cortex-A76
Pipeline Depth	13 stages
Frequency	Up to 3.0 GHz
Process Technology	7nm
Core Type	Out-of-order
NEON	Yes
Power Efficiency	Improved over Cortex-A75
Performance Improvement	35% over Cortex-A75
Core Count	1-4 cores per cluster
ISA Support	AArch64 and AArch32
Branch Prediction	Yes
L1 Data Cache	32KB, per core
L2 Cache	256KB or 512KB, per core
L3 Cache	Up to 4MB
Memory Support	LPDDR4, LPDDR4X, DDR4
DynamIQ Shared Unit (DSU)	DynamIQ Shared Unit (DSU)
Cryptography Extensions	Yes
Virtualization Support	Yes
L1 Cache	64 KB per core