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B4.17 ICV_CTLR_EL1, Interrupt Controller Virtual Control Register, EL1

ICV_CTLR_EL1 controls aspects of the behavior of the GIC virtual CPU interface and provides

information about the features implemented.

Bit field descriptions

ICV_CTLR_EL1 is a 32-bit register and is part of the virtual GIC system registers functional group.

RES0

PRIbits

VCBPR

VEOImode

15 14 13 10 8 7 2 111

IDbits

A3V

SEIS

Figure B4-10 ICV_CTLR_EL1 bit assignments

RES0, [31:16]

Reserved, RES0.

A3V, [15]

Affinity 3 Valid. The value is:

0x1 The virtual CPU interface logic supports non-zero values of Affinity 3 in SGI

generation System registers.

SEIS, [14]

SEI Support. The value is:

0x0 The virtual CPU interface logic does not support local generation of SEIs.

IDbits, [13:11]

Identifier bits. The value is:

0x0 The number of physical interrupt identifier bits supported is 16 bits.

PRIbits, [10:8]

Priority bits. The value is:

0x4 Support 32 levels of physical priority (5 priority bits).

RES0, [7:2]

Reserved, RES0.

VEOImode, [1]

Virtual EOI mode. The possible values are:

0x0 ICV_EOIR0_EL1 and ICV_EOIR1_EL1 provide both priority drop and interrupt

deactivation functionality. Accesses to ICV_DIR_EL1 are UNPREDICTABLE.

B4 GIC registers

B4.17 ICV_CTLR_EL1, Interrupt Controller Virtual Control Register, EL1

reserved.

B4-333

Non-Confidential

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