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ARM Cortex-A76 Core

ARM Cortex-A76 Core
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D3.12 EDPIDR4, External Debug Peripheral Identification Register 4
The EDPIDR4 provides information to identify an external debug component.
Bit field descriptions
The EDPIDR4 is a 32-bit register.
31 0
34
DES_2
78
SIZE
RES0
Figure D3-11 EDPIDR4 bit assignments
RES0, [31:8]
RES0 Reserved.
SIZE, [7:4]
0x0 Size of the component. Log
2
the number of 4KB pages from the start of the
component to the end of the component ID registers.
DES_2, [3:0]
0x4 Arm Limited This is the least significant nibble JEP106 continuation code.
Bit fields and details not provided in this description are architecturally defined. See the Arm
®
Architecture Reference Manual Armv8, for Armv8-A architecture profile.
The EDPIDR4 can be accessed through the external debug interface, offset 0xFD0.
D3 Memory-mapped debug registers
D3.12 EDPIDR4, External Debug Peripheral Identification Register 4
100798_0300_00_en Copyright © 2016–2018 Arm Limited or its affiliates. All rights
reserved.
D3-430
Non-Confidential

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