ARM Cortex-A76 Core User Manual

B2.6 ACTLR_EL2, Auxiliary Control Register, EL2
The ACTLR_EL2 provides IMPLEMENTATION DEFINED configuration and control options for EL2.
Bit field descriptions
ACTLR_EL2 is a 64-bit register, and is part of:
• The Virtualization registers functional group.
• The Other system control registers functional group.
• The IMPLEMENTATION DEFINED functional group.
63 7 6 5 1 04 2
SMEN
PWREN
ECTLREN
ACTLREN
810111213
ERXPFGEN
RES0
CLUSTERPMUEN
3
AMEN
Figure B2-2 ACTLR_EL2 bit assignments
RES0, [63:13]
RES0 Reserved.
CLUSTERPMUEN, [12]
Performance Management Registers enable. The possible values are:
0 CLUSTERPM* registers are not write-accessible from a lower Exception level. This is
the reset value.
1 CLUSTERPM* registers are write-accessible from EL1 Non-secure if they are write-
accessible from EL2.
SMEN, [11]
Scheme Management Registers enable. The possible values are:
0 Registers CLUSTERACPSID, CLUSTERSTASHSID, CLUSTERPARTCR,
CLUSTERBUSQOS, and CLUSTERTHREADSIDOVR are not write-accessible from
EL1 Non-secure. This is the reset value.
1 Registers CLUSTERACPSID, CLUSTERSTASHSID, CLUSTERPARTCR,
CLUSTERBUSQOS, and CLUSTERTHREADSIDOVR are write-accessible from
EL1 Non-secure if they are write-accessible from EL2.
RES0, [9:8]
RES0 Reserved.
PWREN, [7]
Power Control Registers enable. The possible values are:
B2 AArch64 system registers
B2.6 ACTLR_EL2, Auxiliary Control Register, EL2
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B2-145
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ARM Cortex-A76 Core Specifications

General

Architecture	ARMv8.2-A
Microarchitecture	Cortex-A76
Pipeline Depth	13 stages
Frequency	Up to 3.0 GHz
Process Technology	7nm
Core Type	Out-of-order
NEON	Yes
Power Efficiency	Improved over Cortex-A75
Performance Improvement	35% over Cortex-A75
Core Count	1-4 cores per cluster
ISA Support	AArch64 and AArch32
Branch Prediction	Yes
L1 Data Cache	32KB, per core
L2 Cache	256KB or 512KB, per core
L3 Cache	Up to 4MB
Memory Support	LPDDR4, LPDDR4X, DDR4
DynamIQ Shared Unit (DSU)	DynamIQ Shared Unit (DSU)
Cryptography Extensions	Yes
Virtualization Support	Yes
L1 Cache	64 KB per core