ARM Cortex-A76 Core User Manual

B4.22 ICH_VMCR_EL2, Interrupt Controller Virtual Machine Control Register, EL2
ICH_VMCR_EL2 enables the hypervisor to save and restore the virtual machine view of the GIC state.
Bit field descriptions
ICH_VMCR_EL2 is a 32-bit register and is part of:
• The GIC system registers functional group.
• The Virtualization registers functional group.
• The GIC host interface control registers functional group.
31
0
125810
1823
VENG0
VFIQEn
VCBPR
RES0
34
VEOIM
21
VPMR
24
VBPR0
20
VBPR1
17 9
VENG1
Figure B4-12 ICH_VMCR_EL2 bit assignments
VPMR, [31:24]
Virtual Priority Mask.
This field is an alias of ICV_PMR_EL1.Priority.
VBPR0, [23:21]
Virtual Binary Point Register, Group 0. The minimum value is:
0x2 This field is an alias of ICV_BPR0_EL1.BinaryPoint.
VBPR1, [20:18]
Virtual Binary Point Register, Group 1. The minimum value is:
0x3 This field is an alias of ICV_BPR1_EL1.BinaryPoint.
RES0, [17:10]
Reserved, RES0.
VEOIM, [9]
Virtual EOI mode. The possible values are:
0x0 ICV_EOIR0_EL1 and ICV_EOIR1_EL1 provide both priority drop and interrupt
deactivation functionality. Accesses to ICV_DIR_EL1 are UNPREDICTABLE.
0x1 ICV_EOIR0_EL1 and ICV_EOIR1_EL1 provide priority drop functionality only.
ICV_DIR_EL1 provides interrupt deactivation functionality.
This bit is an alias of ICV_CTLR_EL1.EOImode.
RES0, [8:5]
Reserved, RES0.
VCBPR, [4]
B4 GIC registers
B4.22 ICH_VMCR_EL2, Interrupt Controller Virtual Machine Control Register, EL2
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B4-341
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ARM Cortex-A76 Core Specifications

General

Architecture	ARMv8.2-A
Microarchitecture	Cortex-A76
Pipeline Depth	13 stages
Frequency	Up to 3.0 GHz
Process Technology	7nm
Core Type	Out-of-order
NEON	Yes
Power Efficiency	Improved over Cortex-A75
Performance Improvement	35% over Cortex-A75
Core Count	1-4 cores per cluster
ISA Support	AArch64 and AArch32
Branch Prediction	Yes
L1 Data Cache	32KB, per core
L2 Cache	256KB or 512KB, per core
L3 Cache	Up to 4MB
Memory Support	LPDDR4, LPDDR4X, DDR4
DynamIQ Shared Unit (DSU)	DynamIQ Shared Unit (DSU)
Cryptography Extensions	Yes
Virtualization Support	Yes
L1 Cache	64 KB per core