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ARM Cortex-A76 Core

ARM Cortex-A76 Core
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Virtual Common Binary Point Register. The possible values are:
0x0 ICV_BPR0_EL1 determines the preemption group for virtual Group 0 interrupts
only.
ICV_BPR1_EL1 determines the preemption group for virtual Group 1 interrupts.
0x1 ICV_BPR0_EL1 determines the preemption group for both virtual Group 0 and
virtual Group 1 interrupts.
Reads of ICV_BPR1_EL1 return ICV_BPR0_EL1 plus one, saturated to 111. Writes
to ICV_BPR1_EL1 are IGNORED.
VFIQEn, [3]
Virtual FIQ enable. The value is:
0x1 Group 0 virtual interrupts are presented as virtual FIQs.
RES0, [2]
Reserved, RES0.
VENG1, [1]
Virtual Group 1 interrupt enable. The possible values are:
0x0 Virtual Group 1 interrupts are disabled.
0x1 Virtual Group 1 interrupts are enabled.
VENG0, [0]
Virtual Group 0 interrupt enable. The possible values are:
0x0 Virtual Group 0 interrupts are disabled.
0x1 Virtual Group 0 interrupts are enabled.
Bit fields and details that are not provided in this description are architecturally defined. See the Arm
®
Generic Interrupt Controller Architecture Specification.
B4 GIC registers
B4.22 ICH_VMCR_EL2, Interrupt Controller Virtual Machine Control Register, EL2
100798_0300_00_en Copyright © 2016–2018 Arm Limited or its affiliates. All rights
reserved.
B4-342
Non-Confidential

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