D7.2 PMPCSSR, Snapshot Program Counter Sample Register
The PMPCSSR is an alias for the PCSR register.
However, unlike the other view of PCSR, it is not sensitive to reads. That is, reads of PMPCSSR through
the PMU snapshot view do not cause a new sample capture and do not change CIDSR, CID2SR, or
VIDSR.
Bit field descriptions
The PMPCSSR is a 64-bit read-only register.
63 0
PC
EL
56 55
606162
RES0
NS
Figure D7-1 PMPCSSR bit assignments
NS, [63]
Non-secure sample.
EL, [62:61]
Exception level sample.
RES0, [60:56]
Reserved, RES0.
PC, [55:0]
Sampled PC.
Configurations
There are no configuration notes.
Usage constraints
Any access to PMPCSSR returns an error if any of the following occurs:
• The core power domain is off.
• DoubleLockStatus() == TRUE.
D7 PMU snapshot registers
D7.2 PMPCSSR, Snapshot Program Counter Sample Register
100798_0300_00_en Copyright © 2016–2018 Arm Limited or its affiliates. All rights
reserved.
D7-473
Non-Confidential
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