ARM Cortex-A76 Core

A3.1 About clocks, resets, and input synchronization
The Cortex-A76 core supports hierarchical clock gating.
The Cortex-A76 core contains several interfaces that connect to other components in the system. These
interfaces can be in the same clock domain or in other clock domains.
For information about clocks, resets, and input synchronization, see the Arm
®
DynamIQ
™
Shared Unit
Technical Reference Manual.
A3 Clocks, resets, and input synchronization
A3.1 About clocks, resets, and input synchronization
100798_0300_00_en Copyright © 2016–2018 Arm Limited or its affiliates. All rights
reserved.
A3-42
Non-Confidential