ARM Cortex-A76 Core

D3.13 EDPIDRn, External Debug Peripheral Identification Registers 5-7
No information is held in the Peripheral ID5, Peripheral ID6, and Peripheral ID7 Registers.
They are reserved for future use and are RES0.
D3 Memory-mapped debug registers
D3.13 EDPIDRn, External Debug Peripheral Identification Registers 5-7
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D3-431
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