D9.8 TRCCIDCCTLR0, Context ID Comparator Control Register 0
The TRCCIDCCTLR0 controls the mask value for the context ID comparators.
Bit field descriptions
The TRCCIDCCTLR0 is a 32-bit register.
31 04
COMP0
3
RES0
Figure D9-7 TRCCIDCCTLR0 bit assignments
RES0, [31:4]
RES0 Reserved.
COMP0, [3:0]
Controls the mask value that the trace unit applies to TRCCIDCVR0. Each bit in this field
corresponds to a byte in TRCCIDCVR0. When a bit is:
0 The trace unit includes the relevant byte in TRCCIDCVR0 when it performs the
Context ID comparison.
1 The trace unit ignores the relevant byte in TRCCIDCVR0 when it performs the
Context ID comparison.
Bit fields and details not provided in this description are architecturally defined. See the Arm
®
Architecture Reference Manual Armv8, for Armv8-A architecture profile.
The TRCCIDCCTLR0 can be accessed through the external debug interface, offset 0x680.
D9 ETM registers
D9.8 TRCCIDCCTLR0, Context ID Comparator Control Register 0
100798_0300_00_en Copyright © 2016–2018 Arm Limited or its affiliates. All rights
reserved.
D9-507
Non-Confidential
To Next Page
Loading...
