D9.47 TRCLAR, Software Lock Access Register
The TRCLAR controls access to registers using the memory-mapped interface, when PADDRDBG31 is
LOW.
When the software lock is set, write accesses using the memory-mapped interface to all ETM trace unit
registers are ignored, except for write accesses to the TRCLAR.
When the software lock is set, read accesses of TRCPDSR do not change the TRCPDSR.STICKYPD bit.
Read accesses of all other registers are not affected.
Bit field descriptions
The TRCLAR is a 32-bit register.
31 0
KEY
Figure D9-45 TRCLAR bit assignments
KEY, [31:0]
Software lock key value:
0xC5ACCE55 Clear the software lock.
All other write values set the software lock.
Bit fields and details not provided in this description are architecturally defined. See the Arm
®
Architecture Reference Manual Armv8, for Armv8-A architecture profile.
The TRCLAR can be accessed through the external debug interface, offset 0xFB0.
D9 ETM registers
D9.47 TRCLAR, Software Lock Access Register
100798_0300_00_en Copyright © 2016–2018 Arm Limited or its affiliates. All rights
reserved.
D9-557
Non-Confidential
To Next Page
Loading...
