ARM Cortex-A76 Core User Manual

B2.78 ID_PFR1_EL1, AArch32 Processor Feature Register 1, EL1
The ID_PFR1_EL1 provides information about the programmers model and architecture extensions
supported by the core.
Bit field descriptions
ID_PFR1_EL1 is a 32-bit register, and is part of the Identification registers functional group.
This register is Read Only.
31 12 11 8 7 0
GIC CPU
4 316 15
Virtualization
20 192728
GenTimer MProgMod Security ProgMod
24 23
Virt_frac Sec_frac
Figure B2-62 ID_PFR1_EL1 bit assignments
GIC CPU, [31:28]
GIC CPU support:
0 GIC CPU interface is disabled, GICCDISABLE is HIGH, or not implemented.
1 GIC CPU interface is implemented and enabled, GICCDISABLE is LOW.
Virt_frac, [27:24]
0 No features from the Armv7 Virtualization Extensions are implemented.
Sec_frac, [23:20]
0 No features from the Armv7 Virtualization Extensions are implemented.
GenTimer, [19:16]
Generic Timer support:
1 Generic Timer supported.
Virtualization, [15:12]
Virtualization support:
0 Virtualization not implemented.
MProgMod, [11:8]
M profile programmers model support:
0 Not supported.
Security, [7:4]
Security support:
0 Security not implemented.
ProgMod, [3:0]
Indicates support for the standard programmers model for Armv4 and later.
Model must support User, FIQ, IRQ, Supervisor, Abort, Undefined, and System modes:
0 Not supported.
B2 AArch64 system registers
B2.78 ID_PFR1_EL1, AArch32 Processor Feature Register 1, EL1
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B2-258
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ARM Cortex-A76 Core Specifications

General

Architecture	ARMv8.2-A
Microarchitecture	Cortex-A76
Pipeline Depth	13 stages
Frequency	Up to 3.0 GHz
Process Technology	7nm
Core Type	Out-of-order
NEON	Yes
Power Efficiency	Improved over Cortex-A75
Performance Improvement	35% over Cortex-A75
Core Count	1-4 cores per cluster
ISA Support	AArch64 and AArch32
Branch Prediction	Yes
L1 Data Cache	32KB, per core
L2 Cache	256KB or 512KB, per core
L3 Cache	Up to 4MB
Memory Support	LPDDR4, LPDDR4X, DDR4
DynamIQ Shared Unit (DSU)	DynamIQ Shared Unit (DSU)
Cryptography Extensions	Yes
Virtualization Support	Yes
L1 Cache	64 KB per core