ARM Cortex-A76 Core

B2.34 DCZID_EL0, Data Cache Zero ID Register, EL0
The DCZID_EL0 indicates the block size written with byte values of zero by the DC ZVA (Data Cache
Zero by Address) system instruction.
Bit field descriptions
DCZID_EL0 is a 32-bit register, and is part of the Identification registers functional group.
This register is Read Only.
31 5 4 3
0
BlockSize
DZP
RES0
Figure B2-30 DCZID_EL0 bit assignments
RES0, [31:5]
RES0 Reserved.
BlockSize, [3:0]
Log
2
of the block size in words:
0100 The block size is 16 words.
Configurations
There are no configuration notes.
Bit fields and details not provided in this description are architecturally defined. See the Arm
®
Architecture Reference Manual Armv8, for Armv8-A architecture profile.
B2 AArch64 system registers
B2.34 DCZID_EL0, Data Cache Zero ID Register, EL0
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B2-193
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