ARM Cortex-A76 Core User Manual

B5.3 FPSR, Floating-point Status Register
The FPSR provides floating-point system status information.
Bit field descriptions
FPSR is a 32-bit register.
31 08 7
QC IDC
UFC
27 6 5 4 3 2 1
DZC
IXC
OFC
V
C
Z
N
30 29 28
IOC
26
RES0
Figure B5-2 FPSR bit assignments
N, [31]
Negative condition flag for AArch32 floating-point comparison operations. AArch64 floating-
point comparisons set the PSTATE.N flag instead.
Z, [30]
Zero condition flag for AArch32 floating-point comparison operations. AArch64 floating-point
comparisons set the PSTATE.Z flag instead.
C, [29]
Carry condition flag for AArch32 floating-point comparison operations. AArch64 floating-point
comparisons set the PSTATE.C flag instead
V, [28]
Overflow condition flag for AArch32 floating-point comparison operations. AArch64 floating-
point comparisons set the PSTATE.V flag instead.
QC, [27]
Cumulative saturation bit. This bit is set to 1 to indicate that an Advanced SIMD integer
operation has saturated since a 0 was last written to this bit.
RES0, [26:8]
Reserved, RES0.
IDC, [7]
Input Denormal cumulative exception bit. This bit is set to 1 to indicate that the Input Denormal
exception has occurred since 0 was last written to this bit.
RES0, [6:5]
Reserved, RES0.
IXC, [4]
Inexact cumulative exception bit. This bit is set to 1 to indicate that the Inexact exception has
occurred since 0 was last written to this bit.
B5 Advanced SIMD and floating-point registers
B5.3 FPSR, Floating-point Status Register
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ARM Cortex-A76 Core Specifications

General

Architecture	ARMv8.2-A
Microarchitecture	Cortex-A76
Pipeline Depth	13 stages
Frequency	Up to 3.0 GHz
Process Technology	7nm
Core Type	Out-of-order
NEON	Yes
Power Efficiency	Improved over Cortex-A75
Performance Improvement	35% over Cortex-A75
Core Count	1-4 cores per cluster
ISA Support	AArch64 and AArch32
Branch Prediction	Yes
L1 Data Cache	32KB, per core
L2 Cache	256KB or 512KB, per core
L3 Cache	Up to 4MB
Memory Support	LPDDR4, LPDDR4X, DDR4
DynamIQ Shared Unit (DSU)	DynamIQ Shared Unit (DSU)
Cryptography Extensions	Yes
Virtualization Support	Yes
L1 Cache	64 KB per core