EasyManua.ls Logo

ARM Cortex-A76 Core

ARM Cortex-A76 Core
602 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
D9.45 TRCITIATBOUTR, Integration Instruction ATB Out Register
The TRCITIATBOUTR sets the state of the output pins mentioned in the bit descriptions in this section.
Bit field descriptions
The TRCITIATBOUTR is a 32-bit register.
31 0
AFREADY
Reserved
2 1
ATVALID
8 7910
BYTES
Reserved
Figure D9-43 TRCITIATBOUTR bit assignments
For all non-reserved bits:
When a bit is set to 0, the corresponding output pin is LOW.
When a bit is set to 1, the corresponding output pin is HIGH.
The TRCITIATBOUTR bit values always correspond to the physical state of the output pins.
[31:10]
Reserved. Read undefined.
BYTES, [9:8]
Drives the ATBYTESMn[1:0] output pins.
[7:2]
Reserved. Read undefined.
AFREADY, [1]
Drives the AFREADYMn output pin.
ATVALID, [0]
Drives the ATVALIDMn output pin.
Bit fields and details not provided in this description are architecturally defined. See the Arm
®
Architecture Reference Manual Armv8, for Armv8-A architecture profile.
The TRCITIATBOUTR can be accessed through the external debug interface, offset 0xEFC.
D9 ETM registers
D9.45 TRCITIATBOUTR, Integration Instruction ATB Out Register
100798_0300_00_en Copyright © 2016–2018 Arm Limited or its affiliates. All rights
reserved.
D9-555
Non-Confidential

Table of Contents

Related product manuals