C4.6 ETM trace unit register interfaces
The Cortex-A76 core supports only memory-mapped interface to trace registers.
See the Arm
®
Embedded Trace Macrocell Architecture Specification ETMv4 for information on the
behaviors on register accesses for different trace unit states and the different access mechanisms.
Related references
C1.4 External debug interface on page C1-370
C4 Embedded Trace Macrocell
C4.6 ETM trace unit register interfaces
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