ARM Cortex-A76 Core User Manual

(continued)
Event
number
PMU
event bus
(to trace)
Event mnemonic Event description
0x6C
[103] LDREX_SPEC Exclusive operation speculatively executed, LDREX or LDX.
0x6D
[104] STREX_PASS_SPEC Exclusive operation speculatively executed, STREX or STX pass.
0x6E
[105] STREX_FAIL_SPEC Exclusive operation speculatively executed, STREX or STX fail.
0x6F
[106] STREX_SPEC Exclusive operation speculatively executed, STREX or STX.
0x70
[109:107] LD_SPEC Operation speculatively executed, load.
0x71
[112:110] ST_SPEC Operation speculatively executed, store.
0x72
[114:113] LDST_SPEC
Operation speculatively executed, load or store. This event counts the
sum of LD_SPEC and ST_SPEC.
0x73
[117:115] DP_SPEC Operation speculatively executed, integer data-processing.
0x74
[120:118] ASE_SPEC Operation speculatively executed, Advanced SIMD instruction.
0x75
[123:121] VFP_SPEC Operation speculatively executed, floating-point instruction.
0x76
[125:124] PC_WRITE_SPEC Operation speculatively executed, software change of the PC.
0x77
[128:126] CRYPTO_SPEC Operation speculatively executed, Cryptographic instruction.
0x78
[129] BR_IMMED_SPEC Branch speculatively executed, immediate branch.
0x79
[130] BR_RETURN_SPEC Branch speculatively executed, procedure return.
0x7A
[131] BR_INDIRECT_SPEC Branch speculatively executed, indirect branch.
0x7C
[132] ISB_SPEC Barrier speculatively executed, ISB.
0x7D
[134:133] DSB_SPEC Barrier speculatively executed, DSB.
0x7E
[136:135] DMB_SPEC Barrier speculatively executed, DMB.
0x81
[137] EXC_UNDEF Counts the number of undefined exceptions taken locally.
0x82
[138] EXC_SVC Exception taken locally, Supervisor Call.
0x83
[139] EXC_PABORT Exception taken locally, Instruction Abort.
0x84
[140] EXC_DABORT Exception taken locally, Data Abort and SError.
0x86
[141] EXC_IRQ Exception taken locally, IRQ.
0x87
[142] EXC_FIQ Exception taken locally, FIQ.
0x88
[143] EXC_SMC Exception taken locally, Secure Monitor Call.
0x8A
[144] EXC_HVC Exception taken locally, Hypervisor Call.
0x8B
[145] EXC_TRAP_PABORT Exception taken, Instruction Abort not taken locally.
0x8C
[146] EXC_TRAP_DABORT Exception taken, Data Abort or SError not taken locally.
0x8D
[147] EXC_TRAP_OTHER Exception taken, Other traps not taken locally.
0x8E
[148] EXC_TRAP_IRQ Exception taken, IRQ not taken locally.
0x8F
[149] EXC_TRAP_FIQ Exception taken, FIQ not taken locally.
0x90
[152:150] RC_LD_SPEC Release consistency operation speculatively executed, load-acquire.
C2 Performance Monitor Unit
C2.3 PMU events
100798_0300_00_en Copyright © 2016–2018 Arm Limited or its affiliates. All rights
reserved.
C2-381
Non-Confidential

ARM Cortex-A76 Core Specifications

General

Architecture	ARMv8.2-A
Microarchitecture	Cortex-A76
Pipeline Depth	13 stages
Frequency	Up to 3.0 GHz
Process Technology	7nm
Core Type	Out-of-order
NEON	Yes
Power Efficiency	Improved over Cortex-A75
Performance Improvement	35% over Cortex-A75
Core Count	1-4 cores per cluster
ISA Support	AArch64 and AArch32
Branch Prediction	Yes
L1 Data Cache	32KB, per core
L2 Cache	256KB or 512KB, per core
L3 Cache	Up to 4MB
Memory Support	LPDDR4, LPDDR4X, DDR4
DynamIQ Shared Unit (DSU)	DynamIQ Shared Unit (DSU)
Cryptography Extensions	Yes
Virtualization Support	Yes
L1 Cache	64 KB per core