Sel 411L - Figure 3.33 External Fault Detection Logic-Usage in the 87 L Elements; Table 3.21 External Fault Detection Relay Word Bits

P.3.59
Date Code 20151029 Protection Manual SEL-411L Relay
Protection Functions
87L Differential Elements
Figure 3.33 External Fault Detection Logic—Usage in the 87L Elements
Table 3.21 lists the external fault detection logic Relay Word bits. You can use
these bits in custom SEL
OGIC control equations to address security during
external faults.
Disturbance Detection Logic
The relay uses its disturbance detection logic to qualify communications-
dependent 87L trips including operation from currents in the 87L master
mode, as well as 87L direct transfer tripping in outstation relays.
The scheme, which 87L Theory of Operation describes briefly, is fully
integrated with the 87L elements and needs no setting. This section will help
you in understanding logic details, such as when testing the 87L elements for
performance.
The disturbance detection logic consists of four parts.
➤ Integration of the local and remote disturbance detection with
stub bus and test mode conditions (Figure 3.34).
➤ Disturbance detection in local currents and voltages
(Figure 3.35).
Σ
Σ
Σ
Σ
Φ = A, B, C
Calibration Settings
87PCT2E 50%
87PCT4E 50%
87PCT5E 50%
87KPQ 0.33
87KPG 0.33
87IΦDIFM2
87IΦDIFM4
87IΦDIFM5
Fundamental frequency restraint, phase (Φ)
Fundamental frequency restraint, negative-sequence (3I2)
Fundamental frequency restraint, zero-sequence (3I0)
87EFD
Relay Word Bit
87IQRSTM
87IGRSTM
87IΦRSTM
Generalized
Alpha Plane
87LP
Generalized
Alpha Plane
87LQ
Generalized
Alpha Plane
87LG
87kPQ
87kPG
MAX (A, B, C)
100%
87PCT2E
100%
87PCT4E
100%
87PCT5E
Table 3.21 External Fault Detection Relay Word Bits
Name Description
87EFD External fault detected in the vicinity of the 87L zone
87EFDL External fault detected at the local line terminal
87EFDR External fault detected by one or more of the remote terminals