P.3.285
Date Code 20151029 Protection Manual SEL-411L Relay
Protection Functions
87L Channel Synchronization Logic and Status
Clock Offset
Calculations
The relay measures clock offset with respect to the remote relays connected
on each of its active serial channels (channels with 87CHpAC Relay Word bits
asserted). The 87L Theory of Operation describes the principle of the clock
offset measurement, which is based on the well-known ping-pong algorithm.
The relay performs clock offset measurement on each serial channel
individually, regardless of the data synchronization method in effect for the
channel. If you use the channel-based method, the relay applies the measured
channel offset to align the data. Otherwise, the measured clock offset remains
an auxiliary value that the relay uses for other purposes, as this section
explains in following texts.
The raw clock offset calculations the 87L Theory of Operation describes yield
a stream of measurements with finite accuracy. Some errors are the result of
the following:
➤ Finite resolution of time quantity inputs to calculations.
➤ Channel variability such as small-channel asymmetry as
various phase locked loops (PLLs) in the communication
system swing around their equilibriums.
➤ Raw clock offset values missing because of lost packets.
➤ Grossly inaccurate results in raw clock offset calculations upon
channel switching that can have short lived (few tens of ms) but
considerable asymmetry.
The relay therefore checks these raw measurements for basic consistency and
averages these measurement values, before it can use these values for data
alignment and other applications.
When averaging raw clock offset measurements, the relay tracks the number
of data points it actually used for past averaging and declares the quality of the
calculated clock offset according to that count.
The relay declares coarse clock offset accuracy by asserting the 87CHpCL
Relay Word bit after receiving and averaging about 100 ms of 87L
communications packets.
The relay declares high-precision clock offset accuracy by asserting the
87CHpCH Relay Word bit after receiving and averaging about 1 second of
87L communications packets. The two Relay Word bits 87CHpCL and
87CHpCH are mutually exclusive—the 87CHpCL deasserts when the relay
asserts the 87CHpCH Relay Word bit, to signal that it has reached the high-
precision clock offset measurement.
On turn on or after re-establishing communications over a given 87L channel,
the relay restarts the averaging filter. After about 100 ms, the clock offset
measurement becomes available with a coarse accuracy (87CHpCL asserts).
After about a second, the relay declares that it has obtained a high-accuracy
clock offset measurement (87CHpCH asserts). The filtered clock offset for the
p-th active channel is labeled 87CHpTOFF.
If we use the averaged clock offset for data alignment in the channel-based
synchronization mode, the relay applies the extended security Alpha Plane
settings if the quality of synchronization is coarse. It switches to regular
settings only after it obtains high precision clock offset measurements (see
87L Differential Elements).