P.16.72
SEL-411L Relay Protection Manual Date Code 20151029
Relay Word Bits
Row List
410 87CH1LS Channel 1 low-synchronization quality
411 87CH2LS, 87CH3LS Channel 2–3 low-synchronization quality
411 87CH1FB, 87CH2FB,
87CH3FB
Channel 1–3 time fallback mode
411 87BLK 87L current differential blocked
411 87BLKL 87L current differential blocked at local relay
Timekeeping
412 UPD_EN Enable updating internal clock with selected external time source
412 TLOCAL Relay calendar clock and ADC sampling synchronized to none C37.118 compliant high
accuracy IRIG-B time source
412 TPLLEXT Update PLL using external signal
412 TSSW High priority time source switching
412 TGLOBAL Relay calendar clock and ADC sampling synchronized to C37.118 high accuracy IRIG-B
time source
412 SER_BNP Bad jitter on serial port and the IRIG-B signal is lost afterwards
412 BNC_OK IRIG-B signal from BNC port is available and has sufficient quality
412 BNC_SET Qualify BNC IRIG-B high accuracy time source
413 BNC_RST Disqualify BNC IRIG-B high accuracy time source
413 SER_OK IRIG-B signal from Serial Port 1 is available and has sufficient quality
413 SER_SET Qualify serial IRIG-B high accuracy time source
413 SER_RST Disqualify serial IRIG-B high accuracy time source
413 UPD_BLK Block updating internal clock period and master time
413 BNC_BNP Bad jitter on BNC port and the IRIG-B signal is lost afterwards
413 TIRIG Assert while time is based on IRIG for both mark and value
413 TUPDH Assert if update source is high-accuracy time source
414 TSYNCA Assert while the time mark from time source or fixed internal source is not synchronized
414 TSOK Assert if current time source accuracy is sufficient for synchronized phasor measurements
414 PMDOK Assert if data acquisition system is operating correctly
414 TSYNC Assert when ADC sampling is synchronized to an IRIG-B time source
414 BNC_TIM A valid IRIG-B time source is detected on BNC port
414 SER_TIM A valid IRIG-B time source is detected on serial port
414 BLKLPTS Block low priority source from updating relay time
414 Future
415 Future
416 87T09E–87T16E Bits 9–16 transmitted over Ethernet
417 87T17E–87T24E Bits 17–24 transmitted over Ethernet
418 87T25E–87T32E Bits 25–32 transmitted over Ethernet
419 Future
420 87R09P1–87R16P1 Received Bits 9–16 from Remote Peer 1
421 87R17P1–87R24P1 Received Bits 17–24 from Remote Peer 1
422 87R25P1–87R32P1 Received Bits 25–32 from Remote Peer 1
423 Future
Table 16.2 Row List of Relay Word Bits (Sheet 34 of 35)
Row Name Bit Description
To Next Page
Loading...
