ST STM32L0x3 User Manual

RM0367 Rev 7 411/1043
RM0367 Liquid crystal display controller (LCD)
413
17.7.5 LCD display memory (LCD_RAM)
Address offset: 0x14 to 0x50
Reset value: 0x0000 0000
Bits 31:4 Reserved, must be kept at reset value
Bit 3 UDDC: Update display done clear
This bit is written by software to clear the UDD flag in the LCD_SR register.
0: No effect
1: Clear UDD flag
Bit 2 Reserved, must be kept at reset value
Bit 1 SOFC: Start of frame flag clear
This bit is written by software to clear the SOF flag in the LCD_SR register.
0: No effect
1: Clear SOF flag
Bit 0 Reserved, must be kept at reset value
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
SEGMENT_DATA[31:16]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SEGMENT_DATA[15:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:0 SEGMENT_DATA[31:0]
Each bit corresponds to one pixel of the LCD display.
0: Pixel inactive
1: Pixel active

ST STM32L0x3 Specifications

General

Brand	ST
Model	STM32L0x3
Category	Microcontrollers
Language	English