RM0367 Rev 7 477/1043
RM0367 True random number generator (RNG)
478
20.7.3 RNG data register (RNG_DR)
Address offset: 0x008
Reset value: 0x0000 0000
The RNG_DR register is a read-only register that delivers a 32-bit random value when read.
After being read this register delivers a new random value after 42 periods of RNG clock if
the output FIFO is empty.
The content of this register is valid when DRDY=1 and value is not 0x0, even if RNGEN=0.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RNDATA[31:16]
rrrrrrrrrrrrrrrr
1514131211109876543210
RNDATA[15:0]
rrrrrrrrrrrrrrrr
Bits 31:0 RNDATA[31:0]: Random data
32-bit random data which are valid when DRDY=1. When DRDY=0 RNDATA value is zero.
It is recommended to always verify that RNG_DR is different from zero. Because when it is
the case a seed error occurred between RNG_SR polling and RND_DR output reading
(rare event).
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