General-purpose timers (TIM21/22) RM0367
562/1043 RM0367 Rev 7
22.3.3 Clock selection
The counter clock can be provided by the following clock sources:
• Internal clock (CK_INT)
• External clock mode1: external input pin (TIx)
• External clock mode2: external trigger input (ETR connected internally to LSE)
• Internal trigger inputs (ITRx): connecting the trigger output from another timer. Refer to
Section : Using one timer as prescaler for another timer for more details.
Internal clock source (CK_INT)
The internal clock source is selected when the slave mode controller is disabled
(SMS=’000’). The CEN bit in the TIMx_CR1 register and the UG bit in the TIMx_EGR
register are then used as control bits and can be changed only by software (except for UG
which remains cleared). As soon as the CEN bit is programmed to 1, the prescaler is
clocked by the internal clock CK_INT.
Figure 171 shows the behavior of the control circuit and the upcounter in normal mode,
without prescaler.
Figure 171. Control circuit in normal mode, internal clock divided by 1
Internal clock
Counter clock = CK_CNT = CK_PSC
Counter register
CEN=CNT_EN
UG
CNT_INIT
MS31085V2
00
02
03
04 05
06 0732
33
34 35 36
31
01
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