ST STM32L0x3 - Figure 110. Counter Timing Diagram, Internal Clock Divided by 2; Figure 111. Counter Timing Diagram, Internal Clock Divided by 4

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General-purpose timers (TIM2/TIM3) RM0367

484/1043 RM0367 Rev 7

Figure 110. Counter timing diagram, internal clock divided by 2

Figure 111. Counter timing diagram, internal clock divided by 4

MS31079V2

CK_PSC

CNT_EN

Timerclock = CK_CNT

Counter register

Update event (UEV)

Counter overflow

Update interrupt flag

(UIF)

0034

0035

0036

0000

0001

0002

0003