ST STM32L0x3 User Manual

Digital-to-analog converter (DAC) RM0367
360/1043 RM0367 Rev 7
Independent trigger with single triangle generation
To configure the DAC in this conversion mode (refer to Section 15.8: Triangle-wave
generation), the following sequence is required:
1. Set the DAC channelx trigger enable TENx bits.
2. Configure different trigger sources by setting different values in the TSELx[2:0] bits
3. Configure the DAC channelx WAVEx[1:0] bits as “1x” and the same maximum
amplitude value in the MAMPx[3:0] bits
4. Load the DAC channelx data into the desired DAC_DHRx register.
Refer to Section 15.5.2: DAC channel conversion for details on the APB bus (APB or APB1)
that clocks the DAC conversions.
When a DAC channelx trigger arrives, the DAC channelx triangle counter, with the same
triangle amplitude, is added to the DHRx register and the sum is transferred into
DAC_DORx (three APB clock cycles later). The DAC channelx triangle counter is then
updated.
Independent trigger with different triangle generation
To configure the DAC in this conversion mode (refer to Section 15.8: Triangle-wave
generation), the following sequence is required:
1. Set the DAC channelx trigger enable TENx bits.
2. Configure different trigger sources by setting different values in the TSELx[2:0] bits
3. Configure the DAC channelx WAVEx[1:0] bits as “1x” and set different maximum
amplitude values in the MAMPx[3:0] bits
4. Load the DAC channelx data into the desired DAC_DHRx register.
When a DAC channelx trigger arrives, the DAC channelx triangle counter, with a triangle
amplitude configured by MAMPx[3:0], is added to the DHRx register and the sum is
transferred into DAC_DORx (three APB clock cycles later). The DAC channelx triangle
counter is then updated.
Simultaneous software start
To configure the DAC in this conversion mode, the following sequence is required:
1. Load the dual DAC channel data to the desired DHR register (DAC_DHR12RD,
DAC_DHR12LD or DAC_DHR8RD)
In this configuration, one APB clock cycles).
Simultaneous trigger without wave generation
To configure the DAC in this conversion mode, the following sequence is required:
1. Set the two DAC channel trigger enable bits TEN1 and TEN2
2. Configure the same trigger source for both DAC channels by setting the same value in
the TSEL1[2:0] and TSEL2[2:0] bits
3. Load the dual DAC channel data to the desired DHR register (DAC_DHR12RD,
DAC_DHR12LD or DAC_DHR8RD)
When a trigger arrives, the DHR1 and DHR2 registers are transferred into DAC_DOR1 and
DAC_DOR2, respectively (after three APB clock cycles).

ST STM32L0x3 Specifications

General

Brand	ST
Model	STM32L0x3
Category	Microcontrollers
Language	English