Serial peripheral interface/ inter-IC sound (SPI/I2S) RM0367
900/1043 RM0367 Rev 7
• In transmission mode:
If 0x8EAA33 has to be sent (24-bit):
Figure 296. Transmitting 0x8EAA33
• In reception mode:
If data 0x8EAA33 is received:
Figure 297. Receiving 0x8EAA33
Figure 298. I
2
S Philips standard (16-bit extended to 32-bit packet frame with
CPOL = 0)
When 16-bit data frame extended to 32-bit channel frame is selected during the I
2
S
configuration phase, only one access to the SPIx_DR register is required. The 16 remaining
bits are forced by hardware to 0x0000 to extend the data to 32-bit format.
If the data to transmit or the received data are 0x76A3 (0x76A30000 extended to 32-bit), the
operation shown in Figure 299 is required.
MS19593V1
0x8EAA 0x33XX
First write to Data register Second write to Data register
Only the 8 MSB are sent
to compare the 24 bits
8 LSBs have no meaning
and can be anything
MS19594V1
0x8EAA 0x33XX
First read to Data register Second read to Data register
Only the 8 MSB are sent
to compare the 24 bits
8 LSBs have no meaning
and can be anything
MS19599V1
CK
WS
SD
Transmission
Reception
16-bit data
MSB
LSB
Channel left 32-bit
Channel right
16-bit remaining 0 forced
To Next Page
Loading...
