ST STM32L0x3 User Manual

RM0367 Rev 7 305/1043
RM0367 Analog-to-digital converter (ADC)
352
14.3.2 ADC voltage regulator (ADVREGEN)
The ADC has a specific internal voltage regulator which must be enabled and stable before
using the ADC.
The ADC voltage regulator stabilization time is entirely managed by the hardware and
software does not need to care about it.
After ADC operations are complete, the ADC can be disabled (ADEN = 0). To keep power
consumption low, it is important to disable the ADC voltage regulator before entering low-
power mode (LPRun, LPSleep or Stop mode). Refer to Section : ADVREG disable
sequence.
Note: When the internal voltage regulator is disabled, the internal analog calibration is kept.
Analog reference for the ADC internal voltage regulator
The internal ADC voltage regulator uses a buffered copy of the internal voltage reference.
This buffer is always enabled when the main voltage regulator is in normal Run mode (MR
mode, with the device operating either in Run or Sleep mode). When the main voltage
Table 59. ADC internal input/output signals
Internal signal
name
Signal type Description
V
IN
[x]
Analog Input
channels
Connected either to internal channels or to ADC_INi
external channels
TRGx Input ADC conversion triggers
V
SENSE
Input Internal temperature sensor output voltage
V
REFINT
Input Internal voltage reference output voltage
LCD_VLCD1 Input
1/3 V
LCD
when the LCD is configured to 1/3Bias
1/4 V
LCD
when the LCD is configured to 1/4Bias or
1/2Bias
ADC_AWDx_OUT Output
Internal analog watchdog output signal connected to on-
chip timers (x = Analog watchdog number = 1)
Table 60. External triggers
Name Source EXTSEL[2:0]
TRG0 TIM6_TRGO 000
TRG1 TIM21_CH2 001
TRG2 TIM2_TRGO 010
TRG3 TIM2_CH4 011
TRG4 TIM22_TRGO 100
TRG5
(1)
1. Available on all categories except category 3.
TIM2_CH3 101
TRG6 TIM3_TRGO 110
TRG7 EXTI11 111

ST STM32L0x3 Specifications

General

Brand	ST
Model	STM32L0x3
Category	Microcontrollers
Language	English