ST STM32L0x3 User Manual

RM0367 Rev 7 443/1043
RM0367 AES hardware accelerator (AES)
466
Figure 90. Example of suspend mode management
A detailed description of suspend/resume operations is in the sections dedicated to each
AES mode.
19.4.8 AES basic chaining modes (ECB, CBC)
Overview
This section gives a brief explanation of the four basic operation modes provided by the
AES computing core: ECB encryption, ECB decryption, CBC encryption and CBC
decryption. For detailed information, refer to the FIPS publication 197 from November 26,
2001.
Figure 91 illustrates the electronic codebook (ECB) encryption.
Figure 91. ECB encryption
In ECB encrypt mode, the 128-bit plaintext input data block Px in the AES_DINR register
first goes through bit/byte/half-word swapping. The swap result Ix is processed with the AES
core set in encrypt mode, using a 128--bit key. The encryption result Ox goes through
bit/byte/half-word swapping, then is stored in the AES_DOUTR register as 128-bit ciphertext
MSv42148V1
128-bit block 1
Message 1
128-bit block 2
128-bit block 4
128-bit block 5
128-bit block 6
...
AES suspend
sequence
AES resume
sequence
128-bit block 1
128-bit block 2
Message 2
128-bit block 3
New higher-priority
message 2 to be
processed
MSv19105V2
Encrypt
AES_KEYRx (KEY)
AES_DINR (plaintext P1)
AES_DOUTR (ciphertext C1)
Swap
management
DATATYPE[1:0]
DATATYPE[1:0]
Swap
management
Encrypt
AES_KEYRx (KEY)
AES_DINR (plaintext P2)
AES_DOUTR (ciphertext C2)
Swap
management
DATATYPE[1:0]
DATATYPE[1:0]
Swap
management
input
output
Legend
I1 I2
O1 O2
Block 1 Block 2
AES core

ST STM32L0x3 Specifications

General

Brand	ST
Model	STM32L0x3
Category	Microcontrollers
Language	English