ST STM32L0x3 User Manual

Reset and clock control (RCC) RM0367
198/1043 RM0367 Rev 7
7.3.8 GPIO reset register (RCC_IOPRSTR)
Address: 0x1C
Reset value: 0x0000 0000
Access: no wait state, word, half-word and byte access
Bit 5 MSIRDYC: MSI ready Interrupt clear
This bit is set by software to clear the MSIRDYF flag. It is reset by hardware.
0: No effect
1: MSIRDYF flag cleared
Bit 4 PLLRDYC: PLL ready Interrupt clear
This bit is set by software to clear the PLLRDYF flag. It is reset by hardware.
0: No effect
1: PLLRDYF flag cleared
Bit 3 HSERDYC: HSE ready Interrupt clear
This bit is set by software to clear the HSERDYF flag. It is reset by hardware.
0: No effect
1: HSERDYF flag cleared
Bit 2 HSI16RDYC: HSI16 ready Interrupt clear
This bit is set by software to clear the HSI16RDYF flag. It is reset by hardware.
0: No effect
1: HSI16RDYF flag cleared
Bit 1 LSERDYC: LSE ready Interrupt clear
This bit is set by software to clear the LSERDYF flag. It is reset by hardware.
0: No effect
1: LSERDYF flag cleared
Bit 0 LSIRDYC: LSI ready Interrupt clear
This bit is set by software to clear the LSIRDYF flag. It is reset by hardware.
0: No effect
1: LSIRDYF flag cleared
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Res. Res. Res. Res. Res. Res. Res. Res.
IOPH
RST
Res. Res.
IOPER
ST
IOPD
RST
IOPC
RST
IOPB
RST
IOPA
RST
rw rw rw rw rw rw
Bits 31:8 Reserved, must be kept at reset value.
Bit 7 IOPHRST: I/O port H reset
This bit is set and cleared by software.
0: no effect
1: resets I/O port H

ST STM32L0x3 Specifications

General

Brand	ST
Model	STM32L0x3
Category	Microcontrollers
Language	English