Low-power timer (LPTIM) RM0367
620/1043 RM0367 Rev 7
Figure 202. LPTIM output waveform, single counting mode configuration
- Set-once mode activated:
It should be noted that when the WAVE bit-field in the LPTIM_CFGR register is set, the Set-
once mode is activated. In this case, the counter is only started once following the first
trigger, and any subsequent trigger event is discarded as shown in Figure 203.
Figure 203. LPTIM output waveform, Single counting mode configuration
and Set-once mode activated (WAVE bit is set)
In case of software start (TRIGEN[1:0] = ‘00’), the SNGSTRT setting will start the counter for
one-shot counting.
Continous mode
To enable the continuous counting, the CNTSTRT bit must be set.
In case an external trigger is selected, an external trigger event arriving after CNTSTRT is
set will start the counter for continuous counting. Any subsequent external trigger event will
be discarded as shown in Figure 204.
In case of software start (TRIGEN[1:0] = ‘00’), setting CNTSTRT will start the counter for
continuous counting.
MSv39230V2
PWM
0
Compare
LPTIM_ARR
External trigger event
MSv39231V2
PWM
0
Compare
LPTIM_ARR
Discarded trigger
External trigger event
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