RM0367 Rev 7 807/1043
RM0367 Universal synchronous/asynchronous receiver transmitter (USART/UART)
872
The USART interrupt events are connected to the same interrupt vector (see Figure 266).
• During transmission: Transmission Complete, Clear to Send, Transmit data Register
empty or Framing error (in Smartcard mode) interrupt.
• During reception: Idle Line detection, Overrun error, Receive data register not empty,
Parity error, LIN break detection, Noise Flag, Framing Error, Character match, etc.
These events generate an interrupt if the corresponding Enable Control Bit is set.
Figure 266. USART interrupt mapping diagram
Idle line detected IDLE IDLEIE
Parity error PE PEIE
LIN break LBDF LBDIE
Noise Flag, Overrun error and Framing Error in multibuffer
communication.
NF or ORE or FE EIE
Character match CMF CMIE
Receiver timeout RTOF RTOIE
End of Block EOBF EOBIE
Wakeup from Stop mode WUF
(1)
WUFIE
1. The WUF interrupt is active only in Stop mode.
Table 146. USART interrupt requests (continued)
Interrupt event Event flag
Enable Control
bit
MSv19820V1
TC
TCIE
TXE
TXEIE
CTSIF
CTSIE
IDLE
IDLEIE
RXNEIE
ORE
RXNEIE
RXNE
PE
PEIE
LBDF
LBDIE
CMF
CMIE
EOBF
EOBIE
WUF
WUFIE
FE
NF
ORE
RTOF
RTOIE
EIE
USART
interrupt