Flash program memory and data EEPROM (FLASH) RM0367
116/1043 RM0367 Rev 7
3.7.8 Option bytes register (FLASH_OPTR)
Address offset 0x1C
Reset value: 0xX0XX 0XXX. It depends on the value programmed in the option bytes.
During production, it is set to 0x8070 00AA.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
nBOOT1
Res. Res. Res. Res. Res. Res. Res.
BFB2
nRST_STDBY
nRTS_STOP
WDG_SW
BOR_LEV[3:0]
r rrrrrrr
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Res. Res. Res. Res. Res. Res. Res.
WPRMOD
RDPROT
rrrrrrrrr
Bit 31 nBOOT1
Together with BOOT0 input pad, this bit selects the boot source:
– If BOOT0 = 0 and nBOOT1 = X, then the boot is in the Flash program memory.
– If BOOT0 = 1 and nBOOT1 = 0, then the boot is in the RAM memory.
– If BOOT0 = 1 and nBOOT1 = 1, then the boot is in the System memory.
To change boot sources, an Option bytes reloading is necessary. If there is a mismatch on this
configuration during the Option bytes loading, it is loaded with 1.
If the device is protected at Level 2, BOOT0 and nBOOT1 lose their meaning: the boot is
always forced in the Flash program memory.
Bits 30:24 Reserved, must be kept at reset value
Bit 23 BFB2: Boot from Bank 2
This bit contains the user option byte loaded by the device OPTL. This bit is used to boot
from Bank 2. Actually this bit indicates whether a boot from System memory or from Flash
program memory has been selected. If boot from System memory is selected, the jump to
Bank 1 or Bank 2 is performed by software depending on the value of the first two words at
the beginning of each bank. When BFB2 is set, user Flash memory is not aliased at address
0. Instead, the System Flash memory is aliased at address 0 through MEM_MODE bits in
SYSCFG_CFGR1.
0: BOOT from Bank 1 (category 5 devices) or USER Flash memory (other categories)
1: BOOT from System memory
Note: This bit is available in category 5 devices only.
Bit 22 nRST_STDBY
If there is a mismatch on this configuration during the Option bytes loading, it is loaded with 1.
0: Reset generated when entering the Standby mode.
1: No reset generated.
Bit 21 nRST_STOP
If there is a mismatch on this configuration during the Option bytes loading, it is loaded with 1.
0: Reset generated when entering the Stop mode.
1: No reset generated.