RM0367 Rev 7 839/1043
RM0367 Low-power universal asynchronous receiver transmitter (LPUART)
872
Figure 270. TC/TXE behavior when transmitting
Break characters
Setting the SBKRQ bit transmits a break character. The break frame length depends on the
M bits (see Figure 268).
If a ‘1’ is written to the SBKRQ bit, a break character is sent on the TX line after completing
the current character transmission. The SBKF bit is set by the write operation and it is reset
by hardware when the break character is completed (during the stop bits after the break
character). The LPUART inserts a logic 1 signal (STOP) for the duration of 2 bits at the end
of the break frame to guarantee the recognition of the start bit of the next frame.
In the case the application needs to send the break character following all previously
inserted data, including the ones not yet transmitted, the software should wait for the TXE
flag assertion before setting the SBKRQ bit.
Idle characters
Setting the TE bit drives the LPUART to send an idle frame before the first data frame.
30.4.3 LPUART receiver
The LPUART can receive data words of either 7 or 8 or 9 bits depending on the M bits in the
LPUART_CR1 register.
Start bit detection
In LPUART, for START bit detection, a falling edge should be detected first on the Rx line,
then a sample is taken in the middle of the start bit to confirm that it is still ‘0’. If the start
sample is at ‘1’, then the noise error flag (NF) is set, then the START bit is discarded and the
receiver waits for a new START bit. Else, the receiver continues to sample all incoming bits
normally.
TX line
LPUART_DR
Frame 1
TXE flag
F2
TC flag
F3
Frame 2
Software waits until TXE=1
and writes F2 into DR
Software waits until
TXE=1 and writes
F3 into DR
TC is not set
because TXE=0
Software waits until TC=1
Frame 3
TC is set
because TXE=1
Set by hardware
cleared by software
Set by hardware
cleared by software
Set by hardware
Set by hardware
Idle preamble
F1
Software
enables the
LPUART
TC is not set
because TXE=0
Software waits until TXE=1
and writes F1 into DR
MSv31889V1