Low-power universal asynchronous receiver transmitter (LPUART) RM0367
838/1043 RM0367 Rev 7
Character transmission procedure
1. Program the M bits in LPUART_CR1 to define the word length.
2. Select the desired baud rate using the LPUART_BRR register.
3. Program the number of stop bits in LPUART_CR2.
4. Enable the LPUART by writing the UE bit in LPUART_CR1 register to 1.
5. Select DMA enable (DMAT) in LPUART_CR3 if multibuffer Communication is to take
place. Configure the DMA register as explained in multibuffer communication.
6. Set the TE bit in LPUART_CR1 to send an idle frame as first transmission.
7. Write the data to send in the LPUART_TDR register (this clears the TXE bit). Repeat
this for each data to be transmitted in case of single buffer.
8. After writing the last data into the LPUART_TDR register, wait until TC=1. This
indicates that the transmission of the last frame is complete. This is required for
instance when the LPUART is disabled or enters the Halt mode to avoid corrupting the
last transmission.
Single byte communication
Clearing the TXE bit is always performed by a write to the transmit data register.
The TXE bit is set by hardware and it indicates:
• The data has been moved from the LPUART_TDR register to the shift register and the
data transmission has started.
• The LPUART_TDR register is empty.
• The next data can be written in the LPUART_TDR register without overwriting the
previous data.
This flag generates an interrupt if the TXEIE bit is set.
When a transmission is taking place, a write instruction to the LPUART_TDR register stores
the data in the TDR register; next, the data is copied in the shift register at the end of the
currently ongoing transmission.
When no transmission is taking place, a write instruction to the LPUART_TDR register
places the data in the shift register, the data transmission starts, and the TXE bit is set.
If a frame is transmitted (after the stop bit) and the TXE bit is set, the TC bit goes high. An
interrupt is generated if the TCIE bit is set in the LPUART_CR1 register.
After writing the last data in the LPUART_TDR register, it is mandatory to wait for TC=1
before disabling the LPUART or causing the microcontroller to enter the low-power mode
(see Figure 245: TC/TXE behavior when transmitting).