ST STM32L0x3 User Manual

RM0367 Rev 7 321/1043
RM0367 Analog-to-digital converter (ADC)
352
14.5 Data management
14.5.1 Data register and data alignment (ADC_DR, ALIGN)
At the end of each conversion (when an EOC event occurs), the result of the converted data
is stored in the ADC_DR data register which is 16-bit wide.
The format of the ADC_DR depends on the configured data alignment and resolution.
The ALIGN bit in the ADC_CFGR1 register selects the alignment of the data stored after
conversion. Data can be right-aligned (ALIGN = 0) or left-aligned (ALIGN = 1) as shown in
Figure 44.
Figure 44. Data alignment and resolution (oversampling disabled: OVSE = 0)
14.5.2 ADC overrun (OVR, OVRMOD)
The overrun flag (OVR) indicates a data overrun event, when the converted data was not
read in time by the CPU or the DMA, before the data from a new conversion is available.
The OVR flag is set in the ADC_ISR register if the EOC flag is still at ‘1’ at the time when a
new conversion completes. An interrupt can be generated if the OVRIE bit is set in the
ADC_IER register.
When an overrun condition occurs, the ADC keeps operating and can continue to convert
unless the software decides to stop and reset the sequence by setting the ADSTP bit in the
ADC_CR register.
The OVR flag is cleared by software by writing 1 to it.
It is possible to configure if the data is preserved or overwritten when an overrun event
occurs by programming the OVRMOD bit in the ADC_CFGR1 register:
• OVRMOD = 0
– An overrun event preserves the data register from being overwritten: the old data
is maintained and the new conversion is discarded. If OVR remains at 1, further
conversions can be performed but the resulting data is discarded.
• OVRMOD = 1
– The data register is overwritten with the last conversion result and the previous
unread data is lost. If OVR remains at 1, further conversions can be performed
and the ADC_DR register always contains the data from the latest conversion.
0x0
0x00
0x00
0x00
DR[11:0]
DR[9:0]
DR[7:0]
0x00
DR[11:0]
DR[9:0]
DR[7:0]
DR[5:0]
DR[5:0]
0x0
0x00
0x00
0x0
ALIGN RES
0
0x0
1
0x1
0x2
0x3
0x0
0x1
0x2
0x3
15
14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
MS30342V1

ST STM32L0x3 Specifications

General

Brand	ST
Model	STM32L0x3
Category	Microcontrollers
Language	English