RM0367 Rev 7 151/1043
RM0367 Power control (PWR)
172
And when the BOR option is disabled by option byte, the power-down reset is controlled by
the PDR and a “gray zone” exists between the 1.65 V and V
PDR
.
V
BOR
is configured through device option bytes. By default, the Level 4 threshold is
activated. 5 programmable V
BOR
thresholds can be selected.
• BOR Level 1 (V
BOR0
): reset threshold level for 1.69 to 1.80 V voltage range
• BOR Level 2 (V
BOR1
): reset threshold level for 1.94 to 2.1 V voltage range
• BOR Level 3 (V
BOR2
): reset threshold level for 2.3 to 2.49 V voltage range
• BOR Level 4 (V
BOR3
): reset threshold level for 2.54 to 2.74 V voltage range
• BOR Level 5 (V
BOR4
): reset threshold level for 2.77 to 3.0 V voltage range
When the supply voltage (V
DD
) drops below the selected V
BOR
threshold, a device reset is
generated. When the V
DD
is above the V
BOR
upper limit the device reset is released and the
system can start.
BOR can be disabled by programming the device option bytes. To disable the BOR function,
V
DD
must have been higher than V
BOR0
to start the device option byte programming
sequence. The power-on and power-down is then monitored by the POR and PDR (see
Section 6.2.1: Power-on reset (POR)/power-down reset (PDR))
The BOR threshold hysteresis is ~100 mV (between the rising and the falling edge of the
supply voltage).
Figure 14. BOR thresholds
6.2.3 Programmable voltage detector (PVD)
You can use the PVD to monitor the V
DD
power supply by comparing it to a threshold
selected by the PLS[2:0] bits in the PWR_CR (see Section 6.4.1).
The PVD can use an external input analog voltage (PVD_IN) which is compared internally to
VREFINT. The PVD_IN (PB7) has to be configured in Analog mode when PLS[2:0] = 111.
The PVD is enabled by setting the PVDE bit.
A PVDO flag is available in the PWR_CSR register (see Section 6.4.2). It indicates if V
DD
is
higher or lower than the PVD threshold. This event is internally connected to EXTI line16
and can generate an interrupt if it has been enabled through the EXTI registers. The
rising/falling edge sensitivity of EXTI Line16 should be configured according to the PVD
output behavior: if EXTI line 16 is configured to rising edge sensitivity, the interrupt will be
MS32794V1
VDD/VDDA
Reset
BOR threshold
100mV
hysteresis