RM0367 Rev 7 349/1043
RM0367 Analog-to-digital converter (ADC)
352
14.12.9 ADC data register (ADC_DR)
Address offset: 0x40
Reset value: 0x0000 0000
14.12.10 ADC Calibration factor (ADC_CALFACT)
Address offset: 0xB4
Reset value: 0x0000 0000
Bits 31:19 Reserved, must be kept at reset value.
Bits 18:0 CHSELx: Channel-x selection
These bits are written by software and define which channels are part of the sequence of channels
to be converted. Refer to Figure 36: ADC connectivity for ADC inputs connected to external
channels and internal sources.
0: Input Channel-x is not selected for conversion
1: Input Channel-x is selected for conversion
Note: The software is allowed to write this bit only when ADSTART = 0 (which ensures that no
conversion is ongoing).
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
DATA[15:0]
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Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 DATA[15:0]: Converted data
These bits are read-only. They contain the conversion result from the last converted channel. The data
are left- or right-aligned as shown in Figure 44: Data alignment and resolution (oversampling disabled:
OVSE = 0) on page 321.
Just after a calibration is complete, DATA[6:0] contains the calibration factor.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
Res. Res. Res. Res. Res. Res. Res. Res. Res. CALFACT[6:0]
rw rw rw rw rw rw rw
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