ST STM32L0x3 User Manual

Power control (PWR) RM0367
148/1043 RM0367 Rev 7
When V
DD
is below 1.71 V, only range 2 and 3 can be selected:
• From range 2 to range 3
a) Adapt the clock frequency to voltage range 3.
b) Select voltage range 3.
• From range 3 to range 2
a) Select the voltage range 2.
b) Tune the clock frequency if needed.
6.1.9 Voltage range and limitations when V
DD
ranges from 1.71 V to 2.0 V
The STM32L0x3 voltage regulator is based on an architecture designed for Ultra-low-power
a. It does not use any external capacitor. Such regulator is sensitive to fast changes of load.
In this case, the output voltage is reduced for a short period of time. Considering that the
core voltage must be higher than 1.65 V to ensure a 32 MHz operation, this phenomenon is
critical for very low V
DD
voltages (e.g. 1.71 V V
DD
minimum value).
To guarantee 32 MHz operation at V
DD
=1.8 V±5%, with 1 wait state, and V
CORE
range 1,
the CPU frequency in run mode must be managed to prevent any changes exceeding a
ratio of 4 in one shot. A delay of 5 μs must be respected between 2 changes. There is no
limitation when waking up from low-power mode.
6.2 Power supply supervisor
The device has an integrated zeropower power-on reset (POR)/power-down reset (PDR),
coupled with a brown out reset (BOR) circuitry. For devices operating between 1.8 and 3.6
V, the BOR is always active at power-on and ensures proper operation starting from 1.8 V.
After the 1.8 V BOR threshold is reached, the option byte loading process starts, either to
confirm or modify default thresholds, or to disable BOR permanently (in which case, the V
DD
min value at power-down is 1.65 V). For devices operating between 1.65 V and 3.6 V, the
BOR is permanently disabled. Consequently, the start-up time at power-on can be
decreased down to 1 ms typically.
Five BOR thresholds can be configured by option bytes, starting from 1.65 to 3 V. To reduce
the power consumption in Stop mode, the internal voltage reference, V
REFINT
, can be
automatically switch off. The device remains in reset mode when V
DD
is below a specified
threshold, V
POR
, V
PDR
or V
BOR
, without the need for any external reset circuit.
The device features an embedded programmable voltage detector (PVD) that monitors the
V
DD
/V
DDA
power supply and compares it to the V
PVD
threshold. 7 different PVD levels can
be selected by software between 1.85 and 3.05 V, with a 200 mV step. An interrupt can be
generated when V
DD
/V
DDA
drops below the V
PVD
threshold and/or when V
DD
/V
DDA
is
higher than the V
PVD
threshold. The interrupt service routine then generates a warning
message and/or put the MCU into a safe state. The PVD is enabled by software.
The different power supply supervisor (POR, PDR, BOR, PVD) are illustrated in Figure 12.

ST STM32L0x3 Specifications

General

Brand	ST
Model	STM32L0x3
Category	Microcontrollers
Language	English