ST STM32L0x3 User Manual

Flash program memory and data EEPROM (FLASH) RM0367
76/1043 RM0367 Rev 7
If a value in a buffer is not empty, the history shows the time elapsed between the moment it
has been read or written. The history is organized as a list of values from the latest to the
oldest one. At a given instant, only one buffer in a group can have a particular value of
history (except the empty value). Moving a buffer to the latest position, all other buffers in
the group move one step further, thus maintaining the order. The history is changed to the
latest position when the buffer is read (the master requests for the buffer content) or written
(with a new value from the NVM). The memory interface always writes the oldest buffer (or
one empty buffer, if any) of the right group when a new address is required in memory.
Three configuration bits of the FLASH_ACR register are used to manage the buffering:
• DISAB_BUF
Setting this bit disables all buffers. When this bit is 1, the prefetch or the pre-read
operations cannot be enabled and if, for example, the master requests the same
address twice, two readings are generated in the NVM.
• PRFTEN
Setting this bit to 1 (with DISAB_BUF to 0) enables the prefetch. When the memory
interface does not have any operation in progress, the address following the last
address fetched is read and stored in a buffer.
• PRE_READ
Setting this bit to 1 (with DISAB_BUF to 0) enables the pre-read. When the memory
interface does not have any operation in progress or prefetch to execute, the address
following the last data address is read and stored in a buffer.
Fetch and prefetch
A memory interface fetch is a read from the NVM to execute the operation that has been
read. The memory interface does not check the master who performs the read operation, or
the location it reads from, but it only verifies if the read operation is done to execute what
has been read. It means that a fetch can be performed:
• in all areas,
• with any size (16 or 32 bits).
The memory interface stores in the buffers:
• The address of jumps so that, in a loop, it is only necessary to access the NVM the first
time, because then the jump address is already available.
• The last read address so that, when performing a fetching on 16 bits, the other 16 bits
are already available.
Table 14. Internal buffer management
DISAB_BUF PREFTEN PRE_READ
Buffers for fetch Buffers for data
Buffers for
jumps
Buffers for
prefetch
Buffers for
last value
Buffers for
pre-read
Buffers for
last value
1 - - 00000
000 30102
010 21102
001 30111
011 21111

ST STM32L0x3 Specifications

General

Brand	ST
Model	STM32L0x3
Category	Microcontrollers
Language	English