ST STM32L0x3 User Manual

RM0367 Rev 7 215/1043
RM0367 Reset and clock control (RCC)
225
7.3.19 APB1 peripheral clock enable in Sleep mode
register (RCC_APB1SMENR)
Address: 0x48
Reset value: the bits corresponding to the available peripherals are set
Note: Access: no wait state, word, half-word and byte access
Bits 8:6 Reserved, must be kept at reset value.
Bit 5 TIM22SMEN: TIM22 timer clock enable during Sleep mode bit
This bit is set and cleared by software.
0:TIM22 clock disabled in Sleep mode
1: TIM22 clock enabled in Sleep mode (if enabled by TIM22EN)
Bits 4:3 Reserved, must be kept at reset value.
Bit 2 TIM21SMEN: TIM21 timer clock enable during Sleep mode bit
This bit is set and cleared by software.
0: TIM21 clock disabled in Sleep mode
1: TIM21 clock enabled in Sleep mode (if enabled by TIM21EN)
Bit 1 Reserved, must be kept at reset value.
Bit 0 SYSCFGSMEN: System configuration controller clock enable during Sleep mode bit
This bit is set and cleared by software.
0: System configuration controller clock disabled in Sleep mode
1: System configuration controller clock enabled in Sleep mode
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
LPTIM1
SMEN
I2C3S
MEN
DACS
MEN
PWRS
MEN
CRSS
MEN
Res. Res. Res.
USBS
MEN
I2C2S
MEN
I2C1S
MEN
USART5
SMEN
USART4
SMEN
LPUART1
SMEN
USART2
SMEN
Res.
rw rw rw rw rw rw rw rw rw rw rw rw
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Res.
SPI2S
MEN
Res. Res.
WWDG
SMEN
Res.
LCDSM
EN
Res. Res.
TIM7S
MEN
TIM6SM
EN
Res. Res.
TIM3SM
EN
TIM2S
MEN
rw rw rw rw rw rw rw
Bit 31 LPTIM1SMEN: Low-power timer clock enable during Sleep mode bit
This bit is set and cleared by software.
0: Low-power timer clock disabled in Sleep mode
1: Low-power timer clock enabled in Sleep mode (if enabled by LPTIM1EN)
Bit 30 I2C3SMEN: I2C3 clock enable during Sleep mode bit
This bit is set and cleared by software.
0: I2C3 clock disabled in Sleep mode
1: I2C3 clock enabled in Sleep mode (if enabled by I2C3EN)
Bit 29 DACSMEN: DAC interface clock enable during Sleep mode bit
This bit is set and cleared by software.
0: DAC interface clock disabled in Sleep mode
1: DAC interface clock enabled in Sleep mode (if enabled by DACEN)

ST STM32L0x3 Specifications

General

Brand	ST
Model	STM32L0x3
Category	Microcontrollers
Language	English