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ST STM32L0x3 User Manual

ST STM32L0x3
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Independent watchdog (IWDG) RM0367
638/1043 RM0367 Rev 7
25.3.3 Hardware watchdog
If the “Hardware watchdog” feature is enabled through the device option bits, the watchdog
is automatically enabled at power-on, and generates a reset unless the IWDG key register
(IWDG_KR) is written by the software before the counter reaches end of count or if the
downcounter is reloaded inside the window.
25.3.4 Register access protection
Write access to IWDG prescaler register (IWDG_PR), IWDG reload register (IWDG_RLR)
and IWDG window register (IWDG_WINR) is protected. To modify them, the user must first
write the code 0x0000 5555 in the IWDG key register (IWDG_KR). A write access to this
register with a different value breaks the sequence and register access is protected again.
This is the case of the reload operation (writing 0x0000 AAAA).
A status register is available to indicate that an update of the prescaler or of the
downcounter reload value or of the window value is ongoing.
25.3.5 Debug mode
When the device enters Debug mode (core halted), the IWDG counter either continues to
work normally or stops, depending on the configuration of the corresponding bit in
DBGMCU freeze register.

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ST STM32L0x3 Specifications

General IconGeneral
BrandST
ModelSTM32L0x3
CategoryMicrocontrollers
LanguageEnglish

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