ST STM32L0x3 User Manual

RM0367
64/1043 RM0367 Rev 7
2.3 Embedded SRAM
STM32L0x3 devices feature up to 20 Kbytes of static SRAM.
This RAM can be accessed as bytes, half-words (16 bits) or full words (32 bits). This
memory can be addressed at maximum system clock frequency without wait state and thus
by both CPU and DMA.
The SRAM start address is 0x2000 0000.
The CPU can access the SRAM from address 0x0000 0000 when physical remap is
selected through boot pin or MEM_MODE (see Section 10.2.1: SYSCFG memory remap
register (SYSCFG_CFGR1)).
2.4 Boot configuration
In the STM32L0x3, three different boot modes can be selected through the BOOT0 pin and
boot configuration bits in the User option byte, as shown in the following table.
NVM
0X0800 0000 - 0X0802 FFFF up to 192 K
Flash program
memory
-
0x0808 0000 - 0x0808 17FF up to 6 K Data EEPROM -
0x1FF0 0000 - 0x1FF0 1FFF 8 K
System
memory
-
0x1FF8 0020 - 0x1FF8 007F 96
Factory option
bytes
-
0x1FF8 0000 - 0x1FF8 001F 32
User option
bytes
-
1. Refer to Table 1: STM32L0x3 memory density, to Table 2: Overview of features per category and to the device datasheets
for the GPIO ports and peripherals available on your device. The memory area corresponding to unavailable GPIO ports or
peripherals are reserved. The reserved areas are highlighted in gray.
Table 3. STM32L0x3 peripheral register boundary addresses
(1)
(continued)
Bus Boundary address Size (bytes) Peripheral Peripheral register map
Table 4. Boot modes
(1)
1. BOOT1 value is the opposite of nBOOT1 option bit.
Boot mode selection
Boot mode Aliasing
BOOT1 pin BOOT0 pin
X0
Flash program
memory
Flash program memory is selected as boot area
0 1 System memory System memory is selected as boot area
1 1 Embedded SRAM Embedded SRAM is selected as boot area

ST STM32L0x3 Specifications

General

Brand	ST
Model	STM32L0x3
Category	Microcontrollers
Language	English