RM0367 Rev 7 63/1043
RM0367
65
APB1
0X4000 5800 - 0X4000 5BFF 1 K I2C2
Section 28.7.12: I2C register
map
0X4000 5400 - 0X4000 57FF 1 K I2C1
Section 28.7.12: I2C register
map
0X4000 5000 - 0X4000 53FF 1 K USART5
Section 29.8.12: USART
register map
0X4000 4C00 - 0X4000 4FFF 1 K USART4
Section 29.8.12: USART
register map
0X4000 4800 - 0X4000 4BFF 1 K LPUART1
Section 30.7.10: LPUART
register map
0X4000 4400 - 0X4000 47FF 1 K USART2
Section 29.8.12: USART
register map
0X4000 3C000 - 0X4000 43FF 2 K Reserved -
0X4000 3800 - 0X4000 3BFF 1 K SPI2
Section 31.7.10: SPI register
map
0X4000 3400 - 0X4000 37FF 1 K Reserved -
0X4000 3000 - 0X4000 33FF 1 K IWDG
Section 25.4.6: IWDG register
map
0X4000 2C00 - 0X4000 2FFF 1 K WWDG
Section 26.5.4: WWDG register
map
0X4000 2800 - 0X4000 2BFF 1 K
RTC +
BKP_REG
Section 27.7.21: RTC register
map
0X4000 2400 - 0X4000 27FF 1 K LCD
Section 17.7.6: LCD register
map
0X4000 1800 - 0X4000 23FF 3 K Reserved -
0X4000 1400 - 0X4000 17FF 1 K TIMER7
Section 23.4.9: TIM6/7 register
map
0X4000 1000 - 0X4000 13FF 1 K TIMER6
Section 23.4.9: TIM6/7 register
map
0X4000 0800 - 0X4000 0FFF 1 K Reserved -
0X4000 0400 - 0X4000 07FF 1 K TIMER3 Section 21.5: TIMx register map
0X4000 0000 - 0X4000 03FF 1 K TIMER2 Section 21.5: TIMx register map
SRAM
0X2000 2000 - 0X3FFF FFFF ~524 M Reserved -
0X2000 0000 - 0X2000 4FFF up to 20 K SRAM -
Table 3. STM32L0x3 peripheral register boundary addresses
(1)
(continued)
Bus Boundary address Size (bytes) Peripheral Peripheral register map