ST STM32L0x3 User Manual

AES hardware accelerator (AES) RM0367
464/1043 RM0367 Rev 7
19.7.9 AES initialization vector register 0 (AES_IVR0)
Address offset: 0x20
Reset value: 0x0000 0000
19.7.10 AES initialization vector register 1 (AES_IVR1)
Address offset: 0x24
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
IVI[31:16]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
IVI[15:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:0 IVI[31:0]: Initialization vector input, bits [31:0]
Refer to Section 19.4.12: AES initialization vector registers on page 453 for description of the
IVI[127:0] bitfield.
The initialization vector is only used in chaining modes other than ECB.
The initialization vector may be written only when the AES peripheral is disabled.
Reading this bitfield while AES is enabled returns 0x0000 0000.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
IVI[63:48]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
IVI[47:32]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:0 IVI[63:32]: Initialization vector input, bits [63:32]
Refer to Section 19.4.12: AES initialization vector registers on page 453 for description of the
IVI[127:0] bitfield.
The initialization vector is only used in chaining modes other than ECB.
The initialization vector may be written only when the AES peripheral is disabled.
Reading this bitfield while AES is enabled returns 0x0000 0000.

ST STM32L0x3 Specifications

General

Brand	ST
Model	STM32L0x3
Category	Microcontrollers
Language	English