RM0367 Rev 7 781/1043
RM0367 Universal synchronous/asynchronous receiver transmitter (USART/UART)
872
29.5.5 Tolerance of the USART receiver to clock deviation
The asynchronous receiver of the USART works correctly only if the total clock system
deviation is less than the tolerance of the USART receiver. The causes which contribute to
the total deviation are:
• DTRA: Deviation due to the transmitter error (which also includes the deviation of the
transmitter’s local oscillator)
• DQUANT: Error due to the baud rate quantization of the receiver
• DREC: Deviation of the receiver’s local oscillator
• DTCL: Deviation due to the transmission line (generally due to the transceivers which
can introduce an asymmetry between the low-to-high transition timing and the high-to-
low transition timing)
Table 141. Error calculation for programmed baud rates at f
CK
= 32 MHz in both cases of
oversampling by 16 or by 8
(1)
Baud rate Oversampling by 16 (OVER8 = 0) Oversampling by 8 (OVER8 = 1)
S.No Desired Actual BRR
% Error =
(Calculated -
Desired)B.Rate /
Desired B.Rate
Actual BRR % Error
1 2.4 kbaud 2.4 kbaud 0x3415 0 2.4 kbaud 0x6825 0
2 9.6 kbaud 9.6 kbaud 0xD05 0 9.6 kbaud 0x1A05 0
3 19.2 kbaud 19.19 kbaud 0x683 0.02 19.2 kbaud 0xD02 0
4 38.4 kbaud 38.41 kbaud 0x341 0.04 38.39 kbaud 0x681 0.02
5 57.6 kbaud 57.55 kbaud 0x22C 0.08 57.6 kbaud 0x453 0
6 115.2 kbaud 115.1 kbaud 0x116 0.08 115.11 kbaud 0x226 0.08
7 230.4 kbaud 230.21 kbaud 0x8B 0.08 230.21 kbaud 0x113 0.08
8 460.8 kbaud 463.76 kbaud 0x045 0.64 460.06 kbaud 0x85 0.08
9 921.6 kbaud 914.28 kbaud 0x23 0.79 927.5 kbaud 0x42 0.79
10 2 Mbaud 2 Mbaud 0x10 0 2 Mbaud 0x20 0
12 4Mbaud 4Mbaud NA NA 4Mbaud 0x10 0
1. The lower the CPU clock the lower the accuracy for a particular baud rate. The upper limit of the achievable baud rate can
be fixed with these data.
DTRA DQUANT DREC DTCL DWU++++USART receiver′s tolerance<
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