ST STM32L0x3 - TIM6;7 Prescaler (Timx_Psc); TIM6;7 Auto-Reload Register (Timx_Arr)

RM0367 Rev 7 613/1043
RM0367 Basic timers (TIM6/7)
614
23.4.7 TIM6/7 prescaler (TIMx_PSC)
Address offset: 0x28
Reset value: 0x0000
23.4.8 TIM6/7 auto-reload register (TIMx_ARR)
Address offset: 0x2C
Reset value: 0xFFFF
1514131211109876543210
PSC[15:0]
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Bits 15:0 PSC[15:0]: Prescaler value
The counter clock frequency (CK_CNT) is equal to f
CK_PSC
/ (PSC[15:0] + 1).
PSC contains the value to be loaded in the active prescaler register at each update event
(including when the counter is cleared through UG bit of TIMx_EGR register or through
trigger controller when configured in “reset mode”).
1514131211109876543210
ARR[15:0]
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Bits 15:0 ARR[15:0]: Auto-reload value
ARR is the value to be loaded into the actual auto-reload register.
Refer to Section 23.3.1: Time-base unit on page 603 for more details about ARR update and
behavior.
The counter is blocked while the auto-reload value is null.