RM0367 Rev 7 545/1043
RM0367 General-purpose timers (TIM2/TIM3)
546
21.5 TIMx register map
TIMx registers are mapped as described in the table below:
Table 101. TIM2/3 register map and reset values
Offset Register
1514131211109876543210
0x00
TIMx_CR1
Res.
Res.
Res.
Res.
Res.
Res.
CKD [1:0]
ARPE
CMS[1:0]
DIR
OPM
URS
UDIS
CEN
Reset value 0000000000
0x04
TIMx_CR2
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
TI1S
MMS[2:0]
CCDS
Res.
Res.
Res.
Reset value 0 0 0 0 0
0x08
TIMx_SMCR
ETP
ECE
ETPS [1:0]
ETF[3:0]
MSM
TS[2:0]
Res.
SMS[2:0]
Reset value 000000000000 000
0x0C
TIMx_DIER
Res.
TDE
Res.
CC4DE
CC3DE
CC2DE
CC1DE
UDE
Res.
TIE
Res.
CC4IE
CC3IE
CC2IE
CC1IE
UIE
Reset value 0 0 0 0 0 0 0 0 0 0 0 0
0x10
TIMx_SR
Res.
Res.
Res.
CC4OF
CC3OF
CC2OF
CC1OF
Res.
Res.
TIF
Res.
CC4IF
CC3IF
CC2IF
CC1IF
UIF
Reset value 0000 0 00000
0x14
TIMx_EGR
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
TG
Res.
CC4G
CC3G
CC2G
CC1G
UG
Reset value 0 0 0 0 0 0
0x18
TIMx_CCMR1
Output
Compare mode
OC2CE
OC2M
[2:0]
OC2PE
OC2FE
CC2S [1:0]
OC1CE
OC1M
[2:0]
OC1PE
OC1FE
CC1S [1:0]
Reset value 0000000000000000
TIMx_CCMR1
Input Capture
mode
IC2F[3:0]
IC2
PSC
[1:0]
CC2S [1:0] IC1F[3:0]
IC1
PSC
[1:0]
CC1S [1:0]
Reset value 0000000000000000
0x1C
TIMx_CCMR2
Output
Compare mode
OC4CE
OC4M
[2:0]
OC4PE
OC4FE
CC4S [1:0]
OC3CE
OC3M
[2:0]
OC3PE
OC3FE
CC3S [1:0]
Reset value 0000000000000000
TIMx_CCMR2
Input Capture
mode
IC4F[3:0]
IC4
PSC
[1:0]
CC4S [1:0] IC3F[3:0]
IC3
PSC
[1:0]
CC3S [1:0]
Reset value 0000000000000000
0x20
TIMx_CCER
CC4NP
Res.
CC4P
CC4E
CC3NP
Res.
CC3P
CC3E
CC2NP
Res.
CC2P
CC2E
CC1NP
Res.
CC1P
CC1E
Reset value 0 0 0 0 0 0 0 0 0 0 0 0
0x24
TIMx_CNT CNT[15:0]
Reset value 0000000000000000
0x28
TIMx_PSC PSC[15:0]
Reset value 0000000000000000