RM0367 Rev 7 385/1043
RM0367 Liquid crystal display controller (LCD)
413
17.2 LCD main features
• Highly flexible frame rate control.
• Supports Static, 1/2, 1/3, 1/4 and 1/8 duty.
• Supports Static, 1/2, 1/3 and 1/4 bias.
• Double buffered memory allows data in LCD_RAM registers to be updated at any time
by the application firmware without affecting the integrity of the data displayed.
– LCD data RAM of up to 16 x 32-bit registers which contain pixel information
(active/inactive)
• Software selectable LCD output voltage (contrast) from V
LCDmin
to V
LCDmax
.
• No need for external analog components:
– A step-up converter is embedded to generate an internal V
LCD
voltage higher than
V
DD
– Software selection between external and internal V
LCD
voltage source. In case of
an external source, the internal boost circuit is disabled to reduce power
consumption
– A resistive network is embedded to generate intermediate V
LCD
voltages
– The structure of the resistive network is configurable by software to adapt the
power consumption to match the capacitive charge required by the LCD panel.
• The contrast can be adjusted using two different methods:
– When using the internal step-up converter, the software can adjust V
LCD
between
V
LCDmin
and V
LCDmax
.
– Programmable dead time (up to 8 phase periods) between frames.
• Full support of low-power modes: the LCD controller can be displayed in Sleep, Low-
power run, Low-power sleep and Stop modes or can be fully disabled to reduce power
consumption.
• Built in phase inversion for reduced power consumption and EMI (electromagnetic
interference).
• Start of frame interrupt to synchronize the software when updating the LCD data RAM.
• Blink capability:
– Up to 1, 2, 3, 4, 8 or all pixels which can be programmed to blink at a configurable
frequency
– Software adjustable blink frequency to achieve around 0.5 Hz, 1 Hz, 2 Hz or 4 Hz.
• Used LCD segment and common pins should be configured as GPIO alternate
functions and unused segment and common pins can be used for general purpose I/O
or for another peripheral alternate function.
• V
LCD
rails decoupling capability
Note: When the LCD relies on the internal step-up converter, the VLCD pin should be connected
to V
SS
with a capacitor. Its typical value is 1 µF (see C
EXT
value in the product datasheets
for further information).
Note: The VLCD pin should be connected to V
DDA
if the LCD peripheral is not used.