ST STM32L0x3

RM0367 Rev 7 199/1043
RM0367 Reset and clock control (RCC)
225
7.3.9 AHB peripheral reset register (RCC_AHBRSTR)
Address offset: 0x20
Reset value: 0x0000 0000
Access: no wait state, word, half-word and byte access.
Bits 6:5 Reserved, must be kept at reset value.
Bit 4 IOPERST: I/O port E reset
This bit is set and cleared by software.
0: no effect
1: resets I/O port E
Bit 3 IOPDRST: I/O port D reset
This bit is set and cleared by software.
0: no effect
1: resets I/O port D
Bit 2 IOPCRST: I/O port C reset
This bit is set and cleared by software.
0: no effect
1: resets I/O port C
Bit 1 IOPBRST: I/O port B reset
This bit is set and cleared by software.
0: no effect
1: resets I/O port B
Bit 0 IOPARST: I/O port A reset
This bit is set and cleared by software.
0: no effect
1: resets I/O port A
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res.
CRYP
RST
Res. Res. Res.
RNGR
ST
Res. Res. Res.
TSCRS
T
rw rw rw
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Res. Res. Res.
CRC
RST
Res. Res. Res.
MIF
RST
Res. Res. Res. Res. Res. Res. Res.
DMA
RST
rw rw rw
Bits 31:25 Reserved, must be kept at reset value.
Bit 24 CRYPTRST: Crypto module reset
This bit is set and reset by software.
0: no effect
1: resets CRYPTO module
Bits 23:21 Reserved, must be kept at reset value.
Bit 20 RNGRST: Random Number Generator module reset
This bit is set and reset by software.
0: no effect
1: resets RNG module